• Ideal processor for applications involving communications and networking systems.
• The CPU on the MPC860 is a 32-bit PowerPC implementation incorporating memory management units (MMUs) and instruction/data caches.
• Features a real-time clock and a Communications Processor Module
• Communications Processor Module includes serial communication controllers (SCCs), serial management controllers (SMCs), and an Interprocessor-Integrated Controller (I2C) channel for data exchanges between the MPC860 and other ICs with I2C capability.
• The MPC860’s memory controller supports all available types of memory. Its PCMCIA controller supports up to two PCMCIA devices (one socket is provided on the MBX).

• Provision for 4MB or 16MB of on-board DRAM, soldered in place.
• In addition, it accommodates 8MB to 128MB of expansion DRAM in a 168-pin DIMM (dual in-line memory module) socket, XU3.
• The on-board DRAM is composed of two 16-bit devices (either 1M x 16 or 4M x 16).
• Parity protection is optional.
• If expansion DRAM is installed in the DIMM socket, it must have the same characteristics as the on-board DRAM, namely: Single bank, 60ns or faster, 3.3V, Unbuffered

• Flash memory on the MBX series embedded controller consists of 2MB, 4MB, or 8MB of memory in one bank of four devices soldered directly to the board.
• The EPPCBug firmware resident in Flash memory is originally loaded at the factory, but the Flash contents can be reprogrammed if necessary.
• The on-board monitor/debugger, EPPCBug, resides in Flash memory.

The EPPCBug firmware provides functionality for:

• Booting and resetting the system
• Initializing a request
• Displaying and modifying configuration variables
• Running self-tests and diagnostics
• Updating firmware

ROM For purposes of reprogramming Flash, the MBX includes a 32-pin socket (XU1) in which firmware programmers can install a removable boot ROM device.

The MBX series embedded controller uses a 37C672 multi-function I/O controller chip from Standard Microsystems to implement the on-board peripheral functions of the standard version including:

• an asynchronous serial port (COM1) for the console/terminal interface
• IEEE 1284 bidirectional parallel port
• floppy disk drive support
• keyboard and mouse interface

The bidirectional parallel port found in MBX series embedded controllers may take one of two forms depending on the board configuration determined at the time of manufacture:

• a partial IEEE 1284 parallel port with both host and peripheral capability, residing in the processor
• a full IEEE 1284 parallel port with only host capability, implemented with the I/O controller available in standard configurations of the board.

In either case, all parallel I/O interface signals are routed to parallel port header J13. To select between host or peripheral mode, you set control registers in the processor

• The I/O controller incorporates a PS/2-compatible low- and high-density disk drive controller for use with an optional 2.88MB external disk drive.
• The drive interfaces with the I/O controller via MBX board connector J17, which relays control signals.

• The Standard Microsystems 37C672 I/O controller chip used to implement the on-board peripheral functions in standard configurations provides ROM-based keyboard and mouse interface control.
• The keyboard and mouse interface signals are filtered en route to utility connector #2.

• The MPC8xx processor chip incorporates an Ethernet interface that communicates with external devices by way of the SCC1 port.
• The SCC1 port is coupled to an Ethernet transceiver that supports both AUI (optional) and 10BaseT connections to the MBX board.
• The transceiver autodetects AUI and 10BaseT connections, but you can also select AUI or 10BaseT by setting control bits in control register #1.
• Every MBX series embedded controller is assigned an Ethernet station address. The address is $08003Exxxxxx, where xxxxxx is the unique six nibble number assigned to the board (i.e., every board has a different value for xxxxxx).
• Each MBX series embedded controller displays its Ethernet station address on a label attached to the base board.
• In addition, the six bytes including the Ethernet station address are stored in a serial EEPROM device separate from the Ethernet transceiver. That is, the value 08003Exxxxxx is stored in EEPROM.
• The EPPCBug firmware used on MBX series boards has the capability to display the Ethernet station address via the VPD command

• A key feature of the MBX series embedded controller is the PCMCIA bus incorporated into the MPC8xx processor chip.
• PCMCIA modules (also known as PC CARDs) offer a variety of possibilities for memory expansion and mass storage in addition to networking applications, wireless communications, and industrial I/O.
• The MBX series embedded controller supports one PCMCIA type I, II, or III module.
• A 68-pin socket on the base board (XJ26) interfaces with PCMCIA Revision 2.1-compatible modules to add any desirable function.

• The MPC8xx processor chip used on MBX series embedded controllers has a versatile communications interface with Time Slot Allocator (TSA) and Time Division Multiplexing (TDM) channels to support multiplexed as well as non-multiplexed serial I/O.
• The Time Slot Allocator can route any of the Serial Communication Controller channels (SCC2–SCC4) or Serial Management Controller channels (SMC1–SMC2) to the TDM channel to support communication links that require time division multiplexing.
• To implement a specific communication protocol at the physical layer, it is necessary to connect the appropriate transceivers to the MBX board.
• The 8xx/COMM connector (P1), a 144-pin socket, is furnished for that purpose.
• All necessary TDM signals, including clocks, are routed to the 8xx/COMM connector so that a user-supplied add-on card with transceiver circuitry for the desired communication functions can be attached there.
• Signals from SCCs 2–4, SMCs 1–2, the Serial Peripheral Interface (SPI), and the Interprocessor-Integrated Controller (I2C) are all available at the 8xx/COMM connector.

• To support TDM interfaces requiring a parallel data bus or local processor bus interface, all MPC8xx bus interface signals (data, address, control) are routed to the 8xx/COMM board connector (P1), the same 144-pin socket used by the MPC8xx serial communications interface.
• In addition to servicing TDM interfaces that require bus access, the 8xx/COMM connector provides an I/O contact point for other MPC8xx-type devices.
• Those devices may, in turn, send interrupts and assume the function of bus master.

• A significant feature of the MBX series embedded controller is the PC/104-Plus interface, derived from the PCI QSpan device.
• PC/104-Plus modules, plug-compatible with both PCI (Peripheral Component Interconnect) and ISA (Industry Standard Architecture) buses, offer a variety of functionality as display interfaces, as network interfaces, and in industrial I/O applications.
• MBX series boards comply with PCI interface specification 2.1 (although restricted to 32-bit mode) and support the P996.1 Standard for Compact Embedded PC Modules.
• The standard dimensions for PC/104-Plus modules are 3.6 inches by 3.8 inches, but larger sizes are not precluded.
• A 120-pin socket on the MBX board (P2) interfaces with PCI Revision 2.1- compatible modules to add any desirable function.
• A two-part 104-pin ISA socket (J21/J22) accommodates ISA modules. PC/104-Plus (PCI/ISA) modules can be intermingled with PC/104 (ISA) modules and stacked up to four high; three can be masters.

The MBX series embedded controller uses a Winbond W83C553F bridge controller to supply the interface between the PCI local bus and the ISA system I/O bus

In addition, the PCI/ISA bridge controller provides support circuitry for standard configuration boards and incorporates an EIDE interface for hard disk drives.

The PCI/ISA bridge controller provides the following functions:

• PCI bus arbitration for:
  – The PHB (Processor Host Bridge) MPU/local bus interface
  – The PC/104-Plus interface
  – The integrated PCI/EIDE interface
• ISA bus arbitration for DMA devices
• ISA interrupt mapping for four PCI interrupts
• Interrupt controller functionality to support 14 ISA interrupts
• Edge/level control for ISA interrupts
• Seven independently programmable DMA channels
• One 16-bit timer
• Three interval counters/timers

• The EIDE (Enhanced Integrated Drive Electronics) interface with bus master capability supports a direct ribbon cable connection to 2.5-inch hard disk drives via a header (J14) on the MBX board.
• J14 is a standard 44-pin dual-row connector and supplies +5Vdc power in addition to data and control signals
• no separate cable is needed to power the drive.
• A jumper (J7) is provided to configure the IDE channel for native (EIDE) or legacy operation.