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ISPnano - SPI In-System Programming (ISP) Upgrade for Atmel AVR Microcontrollers

 
 
 
This is a 'Device Library upgrade' for the ISPnano programmer which supports In-System Programming (ISP) of Atmel AVR microcontrollers using the SPI interface.
 
 

Features

 
 
Main Features
Advantages of programming via the SPI interface
Disadvantages of programming via the SPI interface

Main Features

  • Supports high-speed programming of most Atmel AVR microcotroller devices
  • Simple 3-wire SPI programming interface
    AVR RESET pin is used to force the device into 'Serial Programming Mode'.
  • Equinox programmers support user-selectable dual SPI frequencies so fuse and lock bits can be programmed at low speed and FLASH / EEPROM areas at high speed. This gives much faster programming times.
  • Support for very slow SPI speeds is available which allows AVR devices running from veryslow clocks to be programmed.
  • User-configurable reset timigs allows any form of simple or complex reset circuit to be controlled from the programmer.
  • A single 'Standalone Programming Project' supports erasing, programming of the FUSES, FLASH, EEPROM and Lock Bits in a single operation.

Advantages of programming via the SPI interface

  • The SPI algorithm is supported by almost all Atmel AVR microcontrollers including AT90S, AT90CAN, AT90USB, ATtiny and ATmega devices. This means that the same Programming Interface can be used on any products containing any AVR microcontroller.
  • The SPI Programming Interface uses only 3 SPI pins (MOSI, MISO, SCK) and the RESET pin.
  • The SPI pins can be used to drive other circuitry such as LED’s and switches on the Target Board as well as being used for ISP purposes. However, this will require careful design on the Target Board to ensure that the programming signals are not compromised.
  • In SPI Mode, it is possible to reprogram a single byte of the EEPROM area without having to perform a Chip Erase first.
    The SPI algorithms are supported as standard on all Equinox ISP Programmers.

Disadvantages of programming via the SPI interface

  • In general terms, the SPI algorithm is 3-4 times slower than the JTAG algorithm.
  • When using the SPI algorithm, the clock used during programming is supplied from either the AVR Internal RC Oscillator or from an external crystal / resonator. The programming SPI speed is completely dependent on the speed of this oscillator.
  • If the oscillator speed is slow, then the maximum SPI speed is seriously limited and the overall programming will be very slow.
  • If the ‘Clock Selection Fuses’ are incorrectly programmed in SPI mode, then the chip may no longer have a valid oscillator and so will not respond to the programmer. This can render the chip unprogrammable except by physically removing it from the Target Board and using either a JTAG or Parallel programmer to resurrect the correct Fuse Settings.

 

For further information about related products, please see the Overview Product.

Product Information
Product:  ISPnano - SPI In-System Programming (ISP) Upgrade for Atmel AVR Microcontrollers
Manufacturer:  Equinox Technologies
Order Code:  ISPnano-UPG17
Availability:  887 in stock
Price:   275.00 (GBP)
 [Excl. VAT]
 
 
Overview Product
SPI In-System Programming (ISP) Support for Atmel AVR Microcontrollers - OVERVIEW >>
 
 
Downloads
Download View Downloads for this Product
 
 
Associated Products View All
8051 Microcontroller - Support Tools
ISPnano Series I - Production ISP Programming Module - OVERVIEW >>
Atmel AVR Microcontroller Tools
ISPnano Series I - Production ISP Programming Module - OVERVIEW >>
Programmers
ISPnano Series I - Production ISP Programming Module - OVERVIEW >>

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