• High-speed In-System Programming (ISP) support of Atmel XMEGA AVR microcontrollers via the 4-wire JTAG Interface
• Supports programming the on-chip FLASH, EEPROM, Fuse and Lock Bits of XMEGA AVR microcontrollers
• Uses the industry standard JTAG Interface to program the target device
• Very high-speed programming due to local data storage and optimised programming algorithms
• Programmers can be used in "Standalone Mode" (no PC) - Up to 64 x XMEGA 'Programming Projects' can be stored inside an ISPnano programmer
• Supports high-speed program / verify of the XMEGA on-chip FLASH and EEPROM in a singe operation.
• Optimised Erase operation supports independent erasing of Application Section, Application Table and Boot Section
• Supports programming of non volatle Fuse Bits
• Supports programming of the "Security Fuses" (Lock Bits) to protect code from being read out

The Atmel XMEGA AVR microcontroller family feature either one or both of the following physical interfaces:

Interface Name	Interface description	Number of interface signals	XMEGA pins required for programming
PDI	Program and Debug Interface	2-wire	·         PDI_CLK ·         PDI_DATA
JTAG	JTAG Program / Debug Interface	4-wire	·         TDI, TMI, TCK, TDO ·         RESET (optional)

A graphical overview of the ‘PDI’ and ‘JTAG’ interfaces is shown in the diagram above.

• XMEGA AVR : Atmel XMEGA AVR - FLASH Microcontroller Family

Please note:
Not all devices may be supported within a family.
Please see the Detailed Device Support List for a list of all devices which the product supports.