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Main Features |
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- Supports high-speed JTAG programming of a single Atmel AVR microcontroller connected via the JTAG interface
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Supports high-speed JTAG programming of multiple Atmel AVR microcontrollers which are connected as part of a 'JTAG Chain' (JTAG daisy-chain mode).
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Fast programming speeds via JTAG (3 - 4 times faster than SPI method)
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Simple 4-wire JTAG Interface to microcontroller
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Same JTAG Interface as Atmel JTAG ICE MK2 Debugger
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User-selectable JTAG frequency
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Supports JTAG Chain Validation
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Supports checking of the 'JTAG ID' of both AVR and any generic JTAG devices eg. CPLD's
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Supports automatic checking of 'Silicon Revision' of target JTAG device
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Advantages of JTAG Programming |
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- The JTAG algorithm is approximately 3-4 times faster at programming compared to the SPI algorithm.
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The programming time using JTAG for the EEPROM is significantly faster than the SPI algorithm
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The JTAG algorithm uses the same ‘JTAG Port’ as the Atmel JTAG-ICE Debugger.
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In JTAG mode is it possible to change the ‘Clock Selection Fuses’ to any value and still program the chip. (with the exception of the ‘JTAGEN’ Fuse)
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It is possible to daisy-chain multiple JTAG devices on the JTAG bus in a so-called ‘JTAG Chain’ and then select to program a particular device in the chain. This functionality is now supported by Equinox programmers running firmware 3.07 and above.
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Portable / Field Production ISP Programmers |
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Click the programmer picture for more information about the selected programmer
   
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Production ISP Programmers |
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Click on the picture of a programmer to view the full programmer description page.
   
  
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JTAG connections (Single JTAG Device) |
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- Supports high-speed JTAG programming of a single Atmel AVR microcontroller
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Uses only 4 x JTAG pins + control of the AVR RESET pin
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Uses the same JTAG port pins as used by the Atmel JTAG ICE debugger
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JTAG Chain Programming Support |
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- Supports programming of Atmel AVR microcontrollers which are part of a 'JTAG Chain'
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An individual 'Programming Project' is used to program a specific 'JTAG Device' in the 'JTAG Chain'
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The algorithm supports 'JTAG Chain' programming of both legacy AVR devices eg. ATmega16 and newer AVR devices eg. ATmega2560 with the devices placed in any order in the JTAG Chain
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High-speed 'JTAG Chain' programming possible due to optimised algorithms
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Supports JTAG Chain validation (checks the integrity of the JTAG Chain)
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Supports checking of the 'JTAG ID' of any other non-AVR JTAG device eg. CPLD in the chain
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ISP Header Pin-out |
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- Equinox programmers feature the same 10-way IDC connector as the Atmel JTAG ICE debugger
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The same JTAG interface can therefore be used for both debugging during the "development phase" and "In-System Programming" during the "production phase"
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